FPGA implementation of random number generator using LFSR and scrambling algorithm for lightweight cryptography-Reference-Cited by-同舟云学术

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FPGA implementation of random number generator using LFSR and scrambling algorithm for lightweight cryptography

Published:2021 Issue:6 Volume:18 Page:1-9
ISSN:1727-2394
Container-title:International Journal of Applied Science and Engineering
language:en
Short-container-title:Int. J. Appl. Sci. Eng.

Author:

Poojari Asmita,H R Nagesh

Publisher

Chaoyang University of Technology (IJASE)

Subject

Control and Optimization,General Engineering,General Agricultural and Biological Sciences,General Chemical Engineering,Numerical Analysis

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. 64-Bit High Speed Counter with Galois LFSR;2024 International Conference on Circuit, Systems and Communication (ICCSC);2024-06-28

2. An efficient analysis for True Random number generators using A Postprocessor, Jitter Metastability, Tree-Based Interleaver & CMOS inverter prototype technology;2022 IEEE International Symposium on Smart Electronic Systems (iSES);2022-12

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