Max-Flow Scheduling in High-Level Synthesis-Reference-Cited by-同舟云学术

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Max-Flow Scheduling in High-Level Synthesis

Published:2007-09-01 Issue:9 Volume:E90-A Page:1940-1948
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Author:

GE L.,CHEN S.,WAKABAYASHI K.,TAKENAKA T.,YOSHIMURA T.

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis;IEICE T FUND ELECTR;2014

2. Leakage Power Aware Scheduling in High-Level Synthesis;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2014

3. Exploration of Schedule Space by Random Walk;IPSJ Transactions on System LSI Design Methodology;2009

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