1. Implementation of High-Speed Multi-Trit Adders for Balanced and Unbalanced Ternary Logic;2024 13th International Conference on Communications, Circuits and Systems (ICCCAS);2024-05-10
2. 16-bit Vedic multiplier Using Carry Skip Adder;2024 International Conference on Intelligent Systems for Cybersecurity (ISCS);2024-05-03
3. Design of an Efficient Reverse Carry Propagate Adder for Area Consumption on VLSI;2024 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI);2024-04-17
4. Ripple Carry Adder Technique for High-Speed and Delay-Line Clocking Based on Low-Power Control;2024 International Conference on Recent Advances in Electrical, Electronics, Ubiquitous Communication, and Computational Intelligence (RAEEUCCI);2024-04-17