DDR Memory Controller Design Based on FPGA

Author:

Wang Shu Hai1,Tian Yuan Yuan1,Chen Shu Wang1

Affiliation:

1. Hebei University of Science and Technology

Abstract

With the rapid development of electronic science and computer science, the large scale integrated circuit applied in the military, economic and social life is more and more widely. Because the DDR SDRAM has twice the SDRAM memory data rate, now has been widely used. The DDR memory controller design for the DDR SDRAM and the connection between the FPGA provides a solution [3]. This paper analyzes the current international technology trends and storage controller DDR2 SDRAM controller detailed technical specifications. DDR2 SDRAM controller configuration based on register information units, with automatic initialization, to determine priorities, to generate the DDR2 command sequence, and other functions, also can undertake signal control and data reading and writing.

Publisher

Trans Tech Publications, Ltd.

Subject

General Engineering

Reference8 articles.

1. Wolf w.Modem VLSI Design:System-on-Chip Design.Upper Saddle River:Prentice Hall PTR. Vol. 81 (2002), pp.25-42.

2. Patterson D, Anderson T, Cardwell N. A Case for Intelligent RAM: IRAM[J]. IEEE MICRO, Vol. 02 (1997), p.34– 44.

3. Wulf W A, McKee S A. Hitting the Memory Wall: Implications of the Obvious[J]. Computer Architecture News, Vol. 98 (1995), p.20 – 24.

4. Lin W F, Reinhardt S K, Burger D. Reducing DRAM Latencies with an Integrated Memory Hierarchy Design[A]. Vol. 103 (2001), pp.301-312.

5. Douglas J.Smith.A practical guide for designing,synthesizing and simulating ASICs and FPGAs using VHDLor Verilog. Vol. 98 (2003), p.32 – 67.

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3