Affiliation:
1. Monolith Semiconductor, Inc.
Abstract
We fabricated 3300V Silicon Carbide (SiC) DMOSFETs on 150mm substrates in a high volume automotive qualified Si CMOS foundry. In this paper we will show that JFET optimization can yield noticeable improvements in on-state performance without exceeding acceptable gate oxide electric fields. For the optimized design, breakdown voltages (BV) in excess of 3900V are observed along with a specific on resistance of 13.5mOhm-cm2 at room temperature and 30mOhm-cm2 at 150°C.
Publisher
Trans Tech Publications, Ltd.
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
Reference3 articles.
1. S. Banerjee, K. Matocha, K. Chatty, J. Nowak, B. Powell, D. Gutierrez, C. Hundley, Manufacturable and Rugged 1.2 KV SiC MOSFETs Fabricated in High-Volume 150mm CMOS Fab, Proceedings of the 2016 28th International Symposium on Power Semiconductor Devices and IC's, 2016, 279-282.
2. K. Hamada, S. Hino, T Kitani, Low On-Resistance SiC-MOSFET with a 3.3kV Blocking Voltage, Mitsubishi Electric Adv. 149 (2015) 14-17.
3. T Tsuji, H. Shiomi, N Ohse, Y. Onishi, K. Fukuda, 3300V-class 4H SiC Implantation-Epitaxial MOSFETs with Low Specific On-resistance of 11.6mΩcm2 and High Avalanche Withstanding Capability, Mat. Sci. Forum 858 (2015) 962-965.
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