Deposition Wet-Etching Deposition (DWD) Method for Polysilicon Gate Fill-In at Flash Memory
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Published:2012-04
Issue:
Volume:187
Page:49-52
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ISSN:1662-9779
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Container-title:Solid State Phenomena
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language:
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Short-container-title:SSP
Author:
Chiang Chun Ling1, Cheng C.M.1, Liao J.H.1, Lin H.J.1, Yeh C.C.1, Hsieh J.Y.1, Yang L.W.1, Yang T.H.1, Chen K.C.1, Lu Chih Yuan1
Affiliation:
1. Macronix International Co. Ltd.
Abstract
The present study aims at polysilicon material fill-in at re-entrant profile at flash memory product. The void was observed after polysilicon fill-in. In order to prevent the void formation, the multi-step process of deposition wet-etching deposition (DWD) method was evaluated. The DWD method is found to play beneficial roles in achieving void-free in the floating gate. The high concentration of NH4OH in APM was choosing for wet etching solution. Scanned electron microscopy (SEM) and transmission electron microscopy (TEM) were employed to measure the polysilicon thickness and cross-section profile of device.
Publisher
Trans Tech Publications, Ltd.
Subject
Condensed Matter Physics,General Materials Science,Atomic and Molecular Physics, and Optics
Reference7 articles.
1. R. Bez, E. Camerlenghi, A. Modelli, and A. Visconti, Proceedings of the IEEE, Vol. 91, 4, p.489, (2003). 2. S. N. Keeney, IEDM Tech. Dig., p.2. 5. 1., (2001). 3. D. Widmann, H. Mader, and H. Friedrich, Technology of Integrated Circuits, Springer-Verlag, page 20, (2000). 4. J. W. Kim, J. H. Park, and J. D. Choi, US Patent 7273783, (2007). 5. I. J. Yeo, W. J. Lee, T. H. Kim, J. H. Kim, and B. M. Yoon, US Patent 7582559, (2009).
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