Threshold Voltage Adjustment for 28nm HfOx/ZrOx/HfOx Gate Dielectric of nMOSFETs Using DPN Process with Annealing Temperatures

Abstract

Following the investigation of the relationship among the annealing temperatures for decoupled plasma nitridation (DPN) process to indirectly manipulate the amount of oxygen vacancy in high-k (HK) gate dielectric, the expected threshold voltage (Vt) of n-channel MOSFET (nMOSFET) device is able to be approached. The uniformity of Vt values related to the channel lengths was fine due to 10% deviation specification, but the roll-up phenomenon coming from the strain effect was observed. The lower annealing temperature shows the higher Vt value due to the higher interface state density, reflecting at the subthreshold swing (S.S.) characteristics.