Chip Warpage Damage Model for ACA Film Type Electronic Packages

Abstract

The use of anisotropically conductive adhesives (ACA) for the direct interconnection of flipped silicon chips to printed circuits (flip chip packaging), offers numerous advantages such as reduced thickness, improved environmental compatibility, lowered assembly process temperature, increased metallization options, cut downed cost, and decreased equipment needs. Despite numerous benefits, ACA film type packages bare several reliability problems. The most critical issue among them is their electrical performance deterioration upon consecutive thermal cycles attributed to gradual delamination growth through chip and adhesive film interface induced by CTE mismatch driven shear and peel stresses. In this study, warpage of the chip is monitored by real time moiré interferometer during –50oC to +125oC temperature range. Moreover, reduction in chip warpage due to increase in delamination length is obtained as in function of thermal fatigue cycles. Finally, a new model to predict damage level of ACA package and remained life is proposed and developed.