Critical Technical Issues in High Voltage SiC Power Devices

Author:

Agarwal Anant K.1,Burk Albert A.2,Callanan Robert2,Capell Craig3,Das Mrinal K.3,Haney Sarah K.2,Hull Brett A.1,Jonas Charlotte3,O'Loughlin Michael J.2,O`Neil Michael3,Palmour John W.2,Powell Adrian R.4,Richmond Jim2,Ryu Sei Hyung3,Stahlbush Robert E.5,Sumakeris Joseph J.4,Zhang Q. Jon1

Affiliation:

1. Cree, Inc.

2. Cree, Incorporation

3. Cree Incorporation

4. Cree Research, Inc.

5. U.S. Naval Research Laboratory

Abstract

In this paper, we review the state of the art of SiC switches and the technical issues which remain. Specifically, we will review the progress and remaining challenges associated with SiC power MOSFETs and BJTs. The most difficult issue when fabricating MOSFETs has been an excessive variation in threshold voltage from batch to batch. This difficulty arises due to the fact that the threshold voltage is determined by the difference between two large numbers, namely, a large fixed oxide charge and a large negative charge in the interface traps. There may also be some significant charge captured in the bulk traps in SiC and SiO2. The effect of recombination-induced stacking faults (SFs) on majority carrier mobility has been confirmed with 10 kV Merged PN Schottky (MPS) diodes and MOSFETs. The same SFs have been found to be responsible for degradation of BJTs.

Publisher

Trans Tech Publications, Ltd.

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

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