Affiliation:
1. CNRS
2. IMB-CNM-CSIC
3. Université de Nantes
4. Ecole Centrale de Lyon
5. Centre de Recherche sur l’Hétéro-Epitaxie et ses Applications CNRS
Abstract
MOS SiO2/GaN structures were fabricated with different surface preparation and different PECVD processes for the dielectric thin film deposition (ECR-PECVD and ICP-PECVD in continuous and pulsed modes). On the basis of C-V curves, the surface preparation steps, involving chemical etching with BOE, UV-Ozone oxidation and oxygen plasma oxidation, were compared in terms of resulting effective charge and interface trap density. A good SiO2/GaN interface quality was achieved for N-type MOS capacitances obtained both with continuousICPPECVD and ECR-PECVD deposition of the SiO2 dielectric. However, the interface quality is greatly reduced for MOS capacitors fabricated on P-type GaN.
Publisher
Trans Tech Publications, Ltd.
Subject
Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science
Reference10 articles.
1. M. -P. Besland et al., J. Appl. Phys., 80, 3100- 09 (1996).
2. W. Huang et al., J. Electron Materials, 35, 726-732 (2006).
3. S.J. Pearton et al., Materials Science and Engineering : R : Reports, 30, 55–212 (2000).
4. E. Al Alam et al., J. Applied Phys., 109, 84511-19 (2011).
5. A. Bousquet et al., Thin Solid Films, 514 45-51 (2006).