Fully Ion Implanted Vertical p-i-n Diodes on High Purity Semi-Insulating 4H-SiC Wafers-Reference-Cited by-同舟云学术

Fully Ion Implanted Vertical p-i-n Diodes on High Purity Semi-Insulating 4H-SiC Wafers

Published:2012-05 Issue: Volume:717-720 Page:985-988
ISSN:1662-9752
Container-title:Materials Science Forum
language:
Short-container-title:MSF

Author:

Nipoti Roberta¹^ORCID,Nath Anindya²,Tian Yong Lai³,Tamarri Fabrizio⁴,Moscatelli Francesco⁴,de Nicola Pietro⁵,Rao Mulpuri V.²

Affiliation:

1. CNR-IMM Sezione di Bologna

2. George Mason University

3. LT Technologies

4. Consiglio Nazionale delle Ricerche (CNR)

5. Laboratory for Micro and Submicro Enabling Technologies of the Emilia-Romagna Region

Abstract

The fabrication of a fully ion-implanted and microwave annealed vertical p-i-n diode using high purity semi-insulating 4H-SiC substrate has been demonstrated for the first time. The thickness of the intrinsic region is the wafer thickness 350 µm. The anode and cathode of the diode have been doped with Al and P, respectively, to concentrations of few times 1020 cm-3 by ion implantation. The post implantation annealing has been performed by microwave heating the samples up to 2100°C. The device rectifying behavior indicates that a carrier modulation takes place in the bulk intrinsic region.

Publisher

Trans Tech Publications, Ltd.

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science

Link

https://www.scientific.net/MSF.717-720.985.pdf

Reference12 articles.

1. M. E. Levinshtein, T. T. Mnatsakanov, P. Ivanov, J. W. Palmour, S. L. Rumyantsev, R. Singh, S. Yurkov. IEEE Transaction on Electron Devices 48 (2001) 1703-1709.

2. L. Storasta, H. Tsuchida, Appl. Phys. Lett., vol. 90 (2007) 062116-3.

3. T. Hiyoshi, T. Kimoto, Applied Physics Express 2 (2009) 091101-3.

4. J. R. Jenny, D. P. Malta, V. F. Tsvetkov, M. K. Das, H. McD. Hobgood, C. H. Carter, R. J. Kumar, J. M. Borrego, R. J. Gutmann, V. Aavikko, J. Appl. Phys. 100 (2006) 113710-6.

5. R. Nipoti, A. Nath, S.B. Qadri, Y-L. Tian, C. Albonetti, C. Carnera, and Mulpuri V. Rao, J. Electron. Mater. (in press - DOI: 10. 1007/s11664-011-1794-7).

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