Fast Estimation of the Lateral Fidelity of Ion Implantation in 4H-SiC through Calibration to JFET Transfer Characteristics in TCAD

Author:

Sakai Kota1,Boettcher Norman2,Szabo Maximilian2,Beuer Susanne2,Rommel Mathias2ORCID

Affiliation:

1. The University of Tokyo

2. Fraunhofer Institute for Integrated Systems and Device Technology (IISB)

Abstract

In the 4H-SiC device fabrication process, ion implantation of aluminium to form p-regions results in spreading (lateral straggling) from the mask design width by a few 100 nm. This has a significant impact on device performance, so device design must take lateral straggling into account. In this study, the impact of lateral straggling is estimated by applying a Gaussian distribution to one dimensional depth profiles obtained from Monte Carlo simulations. In our studies, this approach reduced the computation time by a factor of 300 compared to two-dimensional Monte Carlo simulations. The parameters describing the Gauss function are determined with the aid of fabricated JFET test structures. The pinch-off behaviour of JFET devices with vertical and horizontal channels was analysed in electrical TCAD simulations and calibrated to the characteristics of the fabricated devices. Ultimately, the electrical characteristics of simulations and measurements were found to be in good agreement.

Publisher

Trans Tech Publications, Ltd.

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