Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide-Reference-Cited by-同舟云学术

Investigation of endurance degradation for 3-D charge trap NAND flash memory with bandgap-engineered tunneling oxide

Published:2022-12-25 Issue:24 Volume:19 Page:20220465-20220465
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Kim Jongwoo¹,Jo Hyungjun¹,Cho Yonggyu²,Shim Hyunyoung²,Sim Jaesung²,Shin Hyungcheol¹

Affiliation:

1. Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University

2. NAND Tech. Development Division, SK hynix Inc.

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/19/24/19_19.20220465/_pdf

Reference31 articles.

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2. [2] R. Katsumata, et al.: “Pipe-shaped BiCS flash memory with 16 stacked layers and multi-cell operation for ultra high density storage device,” IEEE Symposium on VLSI Technology (2009).

3. [3] E.-S. Choi and S.-K. Park: “Device considerations for high density and highly reliable 3D NAND Flash cell in near future,” IEEE Int. Electron Device Meeting (2012) 211 (DOI: 10.1109/IEDM.2012.6479011).

4. [4] H. Kim, et al.: “Evolution of NAND flash memory: From 2D to 3D as a storage market leader,” IEEE International Memory Workshop (2017) 1 (DOI: 10.1109/IMW.2017.7939081).

5. [5] K. Parat and A. Goda: “Scaling trends in NAND flash,” IEEE International Electron Devices Meeting (2018) 27 (DOI: 10.1109/IEDM.2018.8614694).

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