A Dual-Port Access Structure of 3D Mesh-Based NoC-Reference-Cited by-同舟云学术

A Dual-Port Access Structure of 3D Mesh-Based NoC

Published:2010 Issue:7 Volume:E93-D Page:1987-1990
ISSN:0916-8532
Container-title:IEICE Transactions on Information and Systems
language:en
Short-container-title:IEICE Trans. Inf. & Syst.

Author:

ZHANG Yuanyuan¹,LIN Shijun²,SU Li¹,JIN Depeng¹,ZENG Lieguang¹

Affiliation:

1. State Key Laboratory on Microwave and Digital Communications, Tsinghua National Laboratory for Information Science and Technology, Department of Electronic Engineering, Tsinghua University

2. Department of Communication Engineering, Xiamen University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Artificial Intelligence,Electrical and Electronic Engineering,Computer Vision and Pattern Recognition,Hardware and Architecture,Software

Link

http://www.jstage.jst.go.jp/article/transinf/E93.D/7/E93.D_7_1987/_pdf

Reference6 articles.

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2. Demystifying 3D ICs: The Pros and Cons of Going Vertical

3. [3] S.B. Lee, S.W. Tam, I. Pefkianakis, S. Lu, M.F. Chang, C. Guo, G. Reinman, C. Peng, M. Naik, L. Zhang, and J. Cong, “A scalable micro wireless interconnect structure for CMPs, ” Proc. 15th annual international conference on Mobile computing and networking, pp.217-228. ACM, 2009.

4. [4] F. Li, C. Nicopoulos, T. Richardson, Y. Xie, V. Narayanan, and M. Kandemir, “Design and management of 3D chip multiprocessors using network-in-memory, ” ACM SIGARCH Computer Architecture News, vol.34, no.2, p.141, 2006.

5. Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures