Optimization of periphery circuits in a 1K-bit PCRAM chip for highly reliable write and read operations
Author:
Affiliation:
1. State Key Laboratory of Functional Materials for Informatics, Shanghai Key Laboratory of Nanofabrication Technology for Memory, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/elex/11/24/11_11.20141071/_pdf
Reference18 articles.
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3. [3] S. Yunseung: VLSIC (2005) 98. DOI:10.1109/VLSIC.2005.1469355
4. [4] A. L. Lacaita and A. Redaelli: Microelectron. Eng. 109 (2013) 351. DOI:10.1016/j.mee.2013.02.105
5. [5] B. Gleixner, F. Pellizzer and R. Bez: NVMTS (2009) 7. DOI:10.1109/NVMT.2009.5429783
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