Feasibility study of current pulse induced 2-bit/4-state multilevel programming in phase-change memory-Reference-Cited by-同舟云学术

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Feasibility study of current pulse induced 2-bit/4-state multilevel programming in phase-change memory

Published:2017-08 Issue: Volume:134 Page:51-57
ISSN:0038-1101
Container-title:Solid-State Electronics
language:en
Short-container-title:Solid-State Electronics

Author:

Liu Yan^ORCID,Fan Xi,Chen Houpeng,Wang Yueqing,Liu Bo,Song Zhitang,Feng Songlin

Funder

National Natural Science Foundation of China

Science and Technology Council of Shanghai

Youth Innovation Promotion Association of CAS

“Strategic Priority Research Program” of the Chinese Academy of Sciences

National Integrate Circuit Research Program of China

Publisher

Elsevier BV

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference27 articles.

1. Hruska Joel. IBM demonstrates next-gen phase-change memory that’s up to 275 times faster than your SSD [Online]. Available: ; 2014 May.

2. Current state of chalcogenide phase change memory;Atwood,2005

3. Phase-change random access memory: a scalable technology;Raoux;IBM J Res Dev,2008

4. Write strategies for 2 and 4-bit multi-level phase-change memory;Nirsch,2007

5. High performance PRAM cell scalable to sub-20nm technology with below 4F2 cell size, extendable to DRAM applications;Kim,2008

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