Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions-Reference-Cited by-同舟云学术

Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions

Published:2013 Issue:10 Volume:E96.C Page:1339-1347
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

MA Chenyue¹,MATTAUSCH Hans Jürgen¹,MIYAKE Masataka¹,IIZUKA Takahiro¹,MATSUZAWA Kazuya²,YAMAGUCHI Seiichiro²,HOSHIDA Teruhiko²,KINOSHITA Akinori²,ARAKAWA Takahiko²,HE Jin³,MIURA-MATTAUSCH Mitiko¹

Affiliation:

1. Graduate School of AdSM, Hiroshima University

2. Semiconductor Technology Academic Research Center

3. PKU-HKUST Shenzhen-Hong Kong Institution

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E96.C/10/E96.C_1339/_pdf

Reference30 articles.

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2. [2] V. Reddy, A.T. Krishinan, A. Marshall, J. Rodriguez, S. Natarajan, T. Rost, and S. Krishnan, “Impact of negative bias temperature instability on digital circuit reliability,” IEEE International Reliability Physics Symposium (IRPS 2002), pp.248-254, 2002.

3. [3] V. Huard, M. Denais, and C. Parthasarath, “NBTI degradation: From physical mechanisms to modeling,” Microelectronics Reliability, vol.46, pp.1-23, 2006.

4. [4] S. Mahapatra and M.A. Alam, “Defect generation in p-MOSFETs under negative-bias stress: An experimental perspective,” IEEE Trans. Devices and Materials Reliability, vol.8, pp.35-46, 2008.

5. [5] H. Küflüoglu and M.A. Alam, “A generalized reaction-diffusion model with explicit H-H₂ dynamics for negative-bias temperature-instability (NBTI) degradation,” IEEE Trans. Electron Devices, vol.54, no.5, pp.1101-1107, 2007.

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