A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis-Reference-Cited by-同舟云学术

A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis

Published:2013 Issue:4 Volume:E96.C Page:454-462
ISSN:0916-8524
Container-title:IEICE Transactions on Electronics
language:en
Short-container-title:IEICE Trans. Electron.

Author:

IMAGAWA Takashi¹,TSUTSUI Hiroshi¹,OCHI Hiroyuki¹,SATO Takashi¹

Affiliation:

1. Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/transele/E96.C/4/E96.C_454/_pdf

Reference7 articles.

1. [1] H.C. Koons, J.E. Mazur, R.S. Selesnick, J.B. Blake, J.F. Fennell, J.L. Roeder, and P.C. Anderson, “The impact of the space environment on space systems,” Proc. Spacecraft Charging Conference, pp.7-11, Nov. 1998.

2. [2] D.C. Matthews and M.J. Dion, “NSEU impact on commercial avionics,” Proc. International Reliability Physics Symposium (IRPS), pp.181-193, April 2009.

3. [3] T. Imagawa, M. Hiromoto, H. Ochi, and T. Sato, “Reliability evaluation environment for exploring design space of coarse-grained reconfigurable architectures,” IEICE Trans. Fundamentals, vol.E93-A, no.12, pp.2524-2532, Dec. 2010.

4. [4] K. Nakahara, S. Kouyama, T. Izumi, H. Ochi, and Y. Nakamura, “Autonomous repair fault tolerant dynamic reconfigurable device,” IEICE Trans. Fundamentals, vol.E91-A, no.12, pp.3612-3621, Dec. 2008.

5. [5] B. Pratt, M. Caffrey, P. Graham, K. Morgan, and M. Wirthlin, “Improving FPGA design robustness with partial TMR,” Proc. International Reliability Physics Symposium (IRPS), pp.226-232, March 2006.

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