A channel multiplexing digital calibration technique for timing mismatch of time-interleaved ADCs
Author:
Affiliation:
1. Institute of VLSI Design, Hefei University of Technology
2. School of Electronic Science and Engineering, Nanjing University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/elex/16/19/16_16.20190540/_pdf
Reference31 articles.
1. [1] W. C. Black, Jr. and D. A. Hodges: “Time interleaved converter arrays,” IEEE J. Solid-State Circuits 15 (1980) 1022 (DOI: 10.1109/JSSC.1980.1051512).
2. [2] B. Razavi: “Design considerations for interleaved ADCs,” IEEE J. Solid-State Circuits 48 (2013) 1806 (DOI: 10.1109/JSSC.2013.2258814).
3. [3] X. Liu, et al.: “An efficient blind calibration method for nonlinearity mis-matches in M-channel TIADCs,” IEICE Electron. Express 14 (2017) 20170468 (DOI: 10.1587/elex.14.20170468).
4. [4] A. Salib, et al.: “A generic foreground calibration algorithm for ADCs with nonlinear impairments,” IEEE Trans. Circuits Syst. I, Reg. Papers 66 (2019) 1874 (DOI: 10.1109/TCSI.2018.2870529).
5. [5] K. C. Dyer, et al.: “An analog background calibration technique for time-interleaved analog-to-digital converters,” IEEE J. Solid-State Circuits 33 (1998) 1912 (DOI: 10.1109/4.735531).
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1. Fully Digital Calibration Technique for Channel Mismatch of TIADC at Any Frequency;IEICE Transactions on Electronics;2023-03-01
2. All-digital calibration algorithm based on channel multiplexing for TI-ADCs;Microelectronics Journal;2022-08
3. Calibration of timing mismatch in TIADC based on monotonicity detecting of sampled data;IEICE Electronics Express;2020
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