Design of self-referenced wide input voltage range LDO using enhanced current mirror buffer and improved lead compensation-Reference-Cited by-同舟云学术

Design of self-referenced wide input voltage range LDO using enhanced current mirror buffer and improved lead compensation

Published:2020-06-10 Issue:11 Volume:17 Page:20200120-20200120
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Liu Sheng¹,Zhao Menglian¹,Yang Zhao¹,Wu Xiaobo¹

Affiliation:

1. Institute of VLSI Design, Zhejiang University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/17/11/17_17.20200120/_pdf

Reference31 articles.

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2. [2] H. Li, et al.: “A fully on-chip digitally assisted LDO regulator with improved regulation and transient responses,” IEEE Trans. Circuits Syst. I, Reg. Papers 65 (2018) 4027 (DOI: 10.1109/TCSI.2018.2851514).

3. [3] J.-H. Lin, et al.: “A high-efficiency and fast-transient digital-low-dropout regulator with the burst mode corresponding to the power-saving modes of DC-DC switching converters,” IEEE ISSCC (2018) 314 (DOI: 10.1109/ISSCC.2018.8310310).

4. [4] T.Y. Man, et al.: “Development of single-transistor-control LDO based on flipped voltage follower for SoC,” IEEE Trans. Circuits Syst. I, Reg. Papers 55 (2008) 1392 (DOI: 10.1109/TCSI.2008.916568).

5. [5] A. Maity and A. Patra: “Tradeoffs aware design procedure for an adaptively biased capacitorless low dropout regulator using nested miller compensation,” IEEE Trans. Power Electron. 31 (2016) 369 (DOI: 10.1109/TPEL.2015.2398868).

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