A fast-transient dual loop LDO with high PSR
Author:
Affiliation:
1. School of Microelectronics, Xidian University
2. School of Computer Science, Xi’an Shiyou University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Link
https://www.jstage.jst.go.jp/article/elex/21/9/21_21.20240172/_pdf
Reference30 articles.
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3. [3] C.-J. Park, et al.: “External capacitor-less low drop-out regulator with 25dB superior power supply rejection in the 0.4-4MHz range,” IEEE J. Solid-State Circuits 49 (2014) 486 (DOI: 10.1109/JSSC.2013.2289897).
4. [4] K.N. Leung and P.K.T. Mok: “A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation,” IEEE J. Solid-State Circuits 38 (2003) 1691 (DOI: 10.1109/JSSC.2003.817256).
5. [5] Y. Lu, et al.: “An NMOS-LDO regulated switched-capacitor DC-DC converter with fast-response adaptive phase digital control,” IEEE Trans. Power Electron. 31(2016) 12941303 (DOI: 10.1109/TPEL.2015.2420572).
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