Burst-Mode CMOS Transimpedance Amplifier Based on a Regulated-Cascode Circuit with Gain-Mode Switching-Reference-Cited by-同舟云学术

Burst-Mode CMOS Transimpedance Amplifier Based on a Regulated-Cascode Circuit with Gain-Mode Switching

Published:2019-06-01 Issue:6 Volume:E102.A Page:845-848
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

KOJIMA Takuya¹,KUNIEDA Mamoru¹,NAKAMURA Makoto¹,ITO Daisuke¹,KISHINE Keiji²

Affiliation:

1. Graduate School of Eng., Gifu University

2. School of Eng., The University of Shiga Prefecture

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

https://www.jstage.jst.go.jp/article/transfun/E102.A/6/E102.A_845/_pdf

Reference11 articles.

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3. [3] G. Gaowei, Z. En, and L. Ye, “Design of 10Gbit/s burst-mode transimpedance preamplifier for PON systems,” J. Southeast University, vol.28, no.4, pp.398-403, 2012.

4. [4] Q. Le, S.-G. Lee, Y.-H. Oh, H.-Y. Kang, and T.-H. Yoo, “A burst-mode receiver for 1.25-Gb/s Ethernet PON with AGC and internally created reset signal,” IEEE J. Solid-State Circuits, vol.39, no.12, pp.2379-2388, 2004. 10.1109/jssc.2004.835644

5. [5] K. Nishimura, H. Kimura, M. Watanabe, T. Nagai, K. Nojima, K. Gomyo, M. Takata, M. Iwamoto, and M. Iwamoto, “A 1.25-Gb/s CMOS burst-mode optical transceiver for ethernet PON system,” IEEE J. Solid-State Circuits, vol.40, no.4, pp.1027-1034, 2005. 10.1109/JSSC.2005.845557

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