On the methodology of tensoresistance determination for n-Ge and n-Si in the crystallographic directions 〈110〉
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Published:2019-05
Issue:
Volume:5
Page:67-74
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ISSN:1025-6415
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Container-title:Reports of the National Academy of Sciences of Ukraine
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language:
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Short-container-title:Dopov. Nac. akad. nauk Ukr.
Publisher
National Academy of Sciences of Ukraine (Co. LTD Ukrinformnauka)
Reference15 articles.
1. 1. Baranskii, P. I., Fedosov, A. V. & Gaidar, G. P. (2000). Physical properties of silicon and germanium crystals in the fields of effective external influence. Lutsk: Nadstyria (in Ukrainian). 2. 2. Kikoin, I. K. & Lazarev, S. D. (1965). New photopiezoelectric effect in semiconductors. Zhurn. eksperim. i teoret. fiziki, 20, No. 2, pp. 780-781 (in Russian). 3. 3. Fedosov, S. A., Khvyshchun, M. V. & Shynkaruk, S. V. (2010). Effect of the concentration of impurities on the change in position of the deep level Ec - 0.2 eV under uniaxial elastic deformation in n-Ge 〈Au〉. Nauk. visnyk Volynskoho nats. un-tu im. Lesi Ukrainky. Fiz. nauky, No. 29, pp. 37-43 (in Ukrainian). 4. 4. Thompson, S., Anand, N., Armstrong, M., Auth, C., Arcot, B., Alavi, M., Bai, P., Bielefeld, J., Bigwood, R., Brandenburg, J., Buehler, M., Cea, S., Chikarmane, V., Choi, C., Frankovic, R., Ghani, T., Glass, G., Han, W., Hoffmann, T., Hussein, M., Jacob, P., Jain, A., Jan, C., Joshi, S., Kenyon, C., Klaus, J., Klopcic, S., Luce, J., Ma, Z., Mcintyre, B., Mistry, K., Murthy, A., Nguyen, P., Pearson, H., Sandford, T., Schweinfurth, R., Shaheed, R., Sivakumar, S., Taylor, M., Tufts, B., Wallace, C., Wang, P., Weber, C. & Bohr, M. (2002). A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 μm2 SRAM cell. Proceedings of the International Electron Devices Meeting Technical Digest (pp. 61-64), San Francisco. doi: https://doi.org/10.1109/IEDM.2002.1175779 5. 5. Ghani, T., Armstrong, M., Auth, C., Bost, M., Charvat, P., Glass, G., Hoffmann, T., Johnson, K., Kenyon, C., Klaus, J., McIntyre, B., Mistry, K., Murthy, A., Sandford, J., Silberstein, M., Sivakumar, S., Smith, P., Zawadzki, K., Thompson, S. & Bohr, M. (2003). A 90 nm high volume manufacturing logic technology featuring novel 45 nm gate length strained silicon CMOS transistors. Proceedings of the International Electron Devices Meeting Technical Digest (pp. 978-980), Washington. doi: https://doi.org/10.1109/IEDM.2003.1269442
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