An analytical accumulation mode SOI pMOSFET model for high-temperature analog applications
Author:
Publisher
National Academy of Sciences of Ukraine (Co. LTD Ukrinformnauka)
Subject
Electrical and Electronic Engineering,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials
Reference15 articles.
1. 1. D. Flandre, S. Adriaensen, A. Akheyar, A. Crahay, L. Demeus et al., Fully depleted SOI CMOS technology for heterogeneous micropower, hightemperature or RF Microsystems // Solid State Electron. 45(4) p. 541-549 (2001).
2. 2. B. Iñiguez, B. Gentinne, V. Dessard, D. Flandre, A physically-based C∞ -continuous model for accumulation-mode SOI pMOSFET's // IEEE Trans. Electron. Devices 46(12), p. 2295-2303 (1999).
3. 3. B. Iñiguez, L. F. Ferreira, B. Gentinne, D. Flandre, A physically-based C∞ -continuous fully-depleted SOI MOSFET model for analog applications // IEEE Trans. Electron. Devices 43(10), p. 568-575 (1996).
4. 4. B. Gentinne, D. Flandre, J.-P. Colinge, F. van de Wiele, Measurement and twodimensional simulation of thin-film SOI MOSFETs: Intrinsic gate capacitances at elevated temperatures, // Solid-State Electron. 39(11), p. 1613-1619 (1996).
5. 5. A. L. P. Rotondaro, U. K. Magnusson, C. Clayes, D. Flandre, A. Terao, and J.-P. Colinge, Evidence of different conduction mechanisms in accumulation mode p-channel SOI MOSFET's at room and liquidhelium temperatures // IEEE Trans. Electron. Devices 40(4), p. 727-732 (1993).
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