Thin and locally dislocation-free SiGe virtual substrate fabrication by lateral selective growth

Abstract

Abstract Locally dislocation-free SiGe-on-insulator (SGOI) is fabricated by CVD. Lateral selective SiGe growth of ∼30%, ∼45% and ∼55% of Ge content is performed around ∼1 μm square Si(001) pillar located under the center of a 6.3 μm square SiO2 on Si-on-insulator substrate which is formed by H2-HCl vapor-phase etching. In the deposited SiGe layer, tensile strain is observed by top-view. The degree of strain is slightly increased at the corner of the SiGe. The tensile strain is caused by the partial compressive strain of SiGe in lateral direction and thermal expansion difference between Si and SiGe. Slightly higher Ge incorporation is observed in higher tensile strain region. At the peaks formed between the facets of growth front, Ge incorporation is reduced. These phenomena are pronounced for SiGe with higher Ge contents. Locally dislocation-free SGOI, which is beneficial for emerging device integration, is formed along 〈010〉 from the Si pillar by lateral aspect-ratio-trapping.