Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication-Reference-Cited by-同舟云学术

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Novel Process for Vertical Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect-Transistor (MOSFET) Fabrication

Published:2003-06-30 Issue:Part 1, No. 6B Volume:42 Page:4138-4141
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Masahara Meishoku,Matsukawa Takashi,Tanoue Hisao,Ishii Kenichi,Liu Yongxun,Sakamoto Kunihiro,Kanemaru Seigo,Suzuki Eiichi

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Link

http://stacks.iop.org/1347-4065/42/i=6S/a=4138/pdf

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Plasma atomic layer etching using conventional plasma equipment;Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films;2009-01

2. Vertical Silicon-Nanowire Formation and Gate-All-Around MOSFET;IEEE Electron Device Letters;2008-07

3. Experimental Study of Effective Carrier Mobility of Multi-Fin-Type Double-Gate Metal–Oxide–Semiconductor Field-Effect Transistors with (111) Channel Surface Fabricated by Orientation-Dependent Wet Etching;Japanese Journal of Applied Physics;2006-04-25

4. Self-aligned direct write of a double-sided transistor gate on membrane using an evaporated e-beam resist;SPIE Proceedings;2006-03-10

5. Fabrication and characterization of vertical-type double-gate metal-oxide-semiconductor field-effect transistor with ultrathin Si channel and self-aligned source and drain;Applied Physics Letters;2006-02-13

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