Optimized Si-Cap Layer Thickness for Tensile-Strained-Si/ Compressively Strained SiGe Dual-Channel Transistors in 0.13 µm Complementary Metal Oxide Semiconductor Technology-Reference-Cited by-同舟云学术

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Optimized Si-Cap Layer Thickness for Tensile-Strained-Si/ Compressively Strained SiGe Dual-Channel Transistors in 0.13 µm Complementary Metal Oxide Semiconductor Technology

Published:2005-09-26 Issue:No. 40 Volume:44 Page:L1248-L1251
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Wang Yen Ping,Wu San Lein,Chang Shoou Jinn

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Strained-Si nMOSFET with a raised source/drain structure;Semiconductor Science and Technology;2008-12-15

2. Investigation of Impact Ionization in Strained-Si n-Channel Metal–Oxide–Semiconductor Field-Effect Transistors;Japanese Journal of Applied Physics;2008-04-25

3. Characteristics of Strained-Si nMOSFET Using Nickel Silicide Source/Drain;Journal of The Electrochemical Society;2008

4. Impact of SiN on Performance in Novel Complementary Metal–Oxide–Semiconductor Architecture Using Substrate Strained-SiGe and Mechanical Strained-Si Technology;Japanese Journal of Applied Physics;2007-05-08

5. Influence of Process Flow on the Characteristics of Strained-Si nMOSFETs;Electrochemical and Solid-State Letters;2007

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