(Invited) MOS Interface Control Technologies for III-V/Ge Channel MOSFETs

Abstract

In order to realize high current drive and low supply voltage CMOS, attentions have recently been paid to III-V and Ge channels. However, one of the most critical issues for realizing Ge/III-V MOSFETs is gate insulator formation with superior MOS interface quality on Ge/III-V. In this paper, we focus on the possible solutions for gate stack technologies on Ge/III-V. As for Ge, GeO2/Ge interfaces have been regarded as promising. We have succeeded in thin EOT gate stacks with Ge oxide interfacial layers by using ECR plasma post oxidation. The high quality Al2O3/GeOx/Ge gate stacks were fabricated by exposing the ALD Al2O3/Ge structures to ECR oxygen plasma. As for InGaAs channels, we have also proposed a novel interfacial control technology utilizing InGaAs surface nitridation by ECR nitrogen plasma and successive post metallization annealing. This interfacial layer is shown to reduce Dit down to low order of 1011 cm-2eV-1.