A CMOS 5.4/3.24-Gbps Dual-Rate CDR with Enhanced Quarter-Rate Linear Phase Detector
Author:
Publisher
Wiley
Subject
Electrical and Electronic Engineering,General Computer Science,Electronic, Optical and Magnetic Materials
Reference8 articles.
1. A 5-Gbit/s Clock- and Data-Recovery Circuit With 1/8-Rate Linear Phase Detector in 0.18-${\rm \mu}\hbox{m}$ CMOS Technology
2. A 10-Gb/s CMOS CDR and DEMUX IC With a Quarter-Rate Linear Phase Detector
3. A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector
4. A 5-Gb/s CDR Circuit With Automatically Calibrated Linear Phase Detector
5. A CMOS 10-gb/s SONET transceiver
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1. A low jitter clock and data recovery with a single edge sensing Bang-Bang PD;IEICE Electronics Express;2014
2. A 1.62/2.7/5.4 Gbps Clock and Data Recovery Circuit for DisplayPort 1.2 with a single VCO;JSTS:Journal of Semiconductor Technology and Science;2013-06-30
3. an 800-MHz LC-VCO with a Linear Control Characteristics in a 130-nm CMOS Technology;Microwave and Optical Technology Letters;2013-05-28
4. A 3.8-GHz highly linear LC-VCO without a varactor device;IEICE Electronics Express;2013
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