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Overlay control for nanoimprint lithography

  • Published:2017-04-03 Issue: Volume: Page:
  • ISSN:0277-786X
  • Container-title:SPIE Proceedings
  • language:
  • Short-container-title:

Author:

Fukuhara Kazuya1,Suzuki Masato1,Mitsuyasu Masaki1,Kono Takuya1,Nakasugi Tetsuro1,Lim Yonghyun2,Jung Wooyung2

Affiliation:

1. Toshiba Corp. (Japan)

2. SK Hynix, Inc. (Korea, Republic of)

Publisher

SPIE

Reference12 articles.

1. Imprint of sub-25 nm vias and trenches in polymers;Chou,1995

2. Nanoimprint lithography for semiconductor devices and future patterning innovation;Higashiki,2011

3. ITRS lithography roadmap: 2015 challenges;Neisser,2015

4. NIL defect performance toward high volume mass production;Hatano,2017

5. Overlay improvement in nanoimprint lithography for 1×-nm patterning

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1. The current status of nano-imprint lithography and its future outlook toward carbon neutrality by 2050;Photomask Japan 2022: XXVIII Symposium on Photomask and Next-Generation Lithography Mask Technology;2022-09-16

2. Improvement of productivity by spin-coating and flash imprint lithography;Journal of Micro/Nanopatterning, Materials, and Metrology;2022-03-04

3. Enabling nanoimprint simulator for quality verification: process-design co-optimization toward high-volume manufacturing;Journal of Micro/Nanopatterning, Materials, and Metrology;2022-01-04

4. Multi-field imprint technology: enabling the productivity enhancement of nano-imprint lithography;Journal of Micro/Nanopatterning, Materials, and Metrology;2021-12-16

5. Enabling nanoimprint simulator for quality verification; Process-design co-optimization toward high volume manufacturing;Design-Process-Technology Co-optimization for Manufacturability XIV;2020-03-23
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