-Reference-Cited by-同舟云学术

Design and manufacturability tradeoffs in unidirectional and bidirectional standard cell layouts in 14 nm node

Author:

Vaidyanathan Kaushik,Ng Siew Hoon,Morris Daniel,Lafferty Neal,Liebmann Lars,Bender Mitchell,Huang Wenbin,Lai Kafai,Pileggi Larry,Strojwas Andrzej

Publisher

SPIE

Cited by 24 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Invited Paper: The Scope and Challenges of Scaling in Advanced Technologies;Proceedings of the 2023 ACM International Workshop on System-Level Interconnect Pathfinding;2023-11-02

2. Incorporating process variation contours in design rule calculation and SRAM design optimization;Design-Process-Technology Co-optimization for Manufacturability XIII;2019-03-20

3. Metamaterial superconductors;Nanophotonics;2018-05-24

4. Pre-PDK block-level PPAC assessment of technology options for sub-7nm high-performance logic;Design-Process-Technology Co-optimization for Manufacturability XII;2018-03-20

5. Exploratory design of on-chip power delivery for 14, 10, and 7 nm and beyond FinFET ICs;Integration;2018-03

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