Author:
Chava Bharani,Rio David,Sherazi Yasser,Trivkovic Darko,Gillijns Werner,Debacker Peter,Raghavan Praveen,Elsaid Ahmad,Dusa Mircea,Mercha Abdelkarim,Ryckaert Julien,Verkest Diederik
Reference2 articles.
1. Design technology co-optimization for a robust 10nm Metal1 solution for logic design and SRAM;Vandewalle,2014
2. Rethinking ASIC design with next generation lithography and process integration;Vaidyanathan,2013
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