An integrated design-to-manufacturing flow for SADP
Author:
Publisher
SPIE
Reference2 articles.
1. Standardcell design in N7: EUV vs. immersion;Chava,2015
2. Inverse lithography technique for advanced CMOS nodes;Villaret,2013
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1. Exploring patterning limit and enhancement techniques to improve printability of 2D shapes at 3nm node;Design-Process-Technology Co-optimization for Manufacturability XIV;2020-03-23
2. Integrated manufacturing flow for selective-etching SADP/SAQP;Design-Process-Technology Co-optimization for Manufacturability XII;2018-03-20
3. Comparison between multi-colored LEn SADP/SAQP and selective-etching SADP/SAQP;Design-Process-Technology Co-optimization for Manufacturability XII;2018-03-20
4. Ultimate patterning limits for EUV at 5nm node and beyond;Extreme Ultraviolet (EUV) Lithography IX;2018-03-20
5. Exploring EUV and SAQP pattering schemes at 5nm technology node;Extreme Ultraviolet (EUV) Lithography IX;2018-03-20
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