Design and simulation of phase looked loop PLL based frequency synthesis

Author:

Albderi Suham A.,Hussein Karar H.,Kadhum Ali Abdyasser,Kahdim Nader Abdallah,Talib Jaber Ghaib

Publisher

AIP Publishing

Reference14 articles.

1. Singh, M., Ranjan, S.M., Ali, Z.: A study of different oscillator structures. Int. J. Innov. Res. Sci. Eng. Technol. 3 (2014)

2. Arwitha, M.L., Días, O.G., Álvarez, C.R.B.: A performance comparison of CMOS voltagecontrolled ring oscillators for its application to generation with distribution clock networks. Sci. J. Circuits (2013)

3. Demartinos, A.C., Tsimpos, A., Vlassis, S., Souliotis, G.: Delay elements suitable for CMOS ring oscillators. J. Eng. Sci. Technol. Rev. (2016) by-design voltage-controlled oscillator for mixed-signal phase-locked loops. IEEE Trans. Nucl. Sci. 55 (2008)

4. Singh, M.K., Bhattacharyya, T.K., Dutta, A.: Fully integrated CMOS frequency synthesizer for ZigBee applications. In: 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, pp. 780–783 (2005)

5. Mandal, D., Bhattacharyya, T.K.: 7.95 mW, 2.4 GHz fully-integrated CMOS integer N frequency synthesizer. In: 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID’07) (2007)

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