FFT implementation of OFDM for future 5G communication
Author:
Publisher
AIP Publishing
Link
http://aip.scitation.org/doi/pdf/10.1063/5.0152747
Reference15 articles.
1. An Area Efficient 1024-Point Low Power Radix-22 FFT Processor With Feed-Forward Multiple Delay Commutators
2. Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures
3. VLSI Design and Implementation of Reconfigurable 46-Mode Combined-Radix-Based FFT Hardware Architecture for 3GPP-LTE Applications
4. Design and Implementation of Flexible and Reconfigurable SDF-Based FFT Chip Architecture With Changeable-Radix Processing Elements
5. I.-G. Jang and G.-D. Jo, “Low latency IFFT design for OFDM systems supporting full-duplex FDD,” in Proc. 9th Int. Conf. Ubiquitous Future Netw. (ICUFN), Jul. 2017, pp. 642–646.
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