Bias-dependent electron velocity and short-channel effect in scaling sub-100 nm InAlN/GaN HFETs

Author:

Wang Mingyan1ORCID,Zhou Heng1ORCID,Liu Chao1ORCID,Lin Zhaojun1ORCID,Zeng Yuping2ORCID,Cui Peng3ORCID

Affiliation:

1. School of Integrated Circuits, Shandong University 1 , Jinan 250101, China

2. School of Electrical and Computer Engineering, University of Delaware 2 , Newark, Delaware 19716, USA

3. Institute of Novel Semiconductors, Shandong University 3 , Jinan 250101, China

Abstract

This work reports on the extraction and simulation of the electron velocity–gate voltages relationship for sub-100 nm InAlN/GaN heterojunction field-effect transistors (HFETs). A peak electron velocity (ve) at an electron density (ns) of 0.41 × 1013 cm−2 was observed at 1.06 × 107 cm/s in an InAlN/GaN HFET with 60 nm gate length (Lg) by delay time analysis. The ve at a high ns of 1.5 × 1013 cm−2 was observed at 0.6 × 107 cm/s. This peak ve behavior is explained by polarization Coulomb field (PCF) scattering and optical phonon scattering based on a Monte Carlo method. As Lg scaled from 350 to 60 nm, the current gain cutoff frequency (fT) and transconductance (gm) were improved. However, the thermal performance was degraded with a bad figure of merit P150 °C. Although a weakening of the control capability of Vgs on ns (Δns/ΔVgs) was observed in the shorter Lg device, which leads to a decrease in device gm, the larger electron velocity by the increased lateral electric field (E) and the larger Δve/ΔVgs by the increased PCF scattering still enhance the peak gm. Results indicate that the enhancement of Δve/ΔVgs is a vital method to strengthen the modulation of the gate on current and to suppress the short channel effect in GaN HFET. Our work supports a deeper understanding and analysis of sub-100 nm InAlN/GaN HFET device performance and physical mechanisms.

Funder

National Natural Science Foundation of China

Publisher

AIP Publishing

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