Source/drain-tied poly-Si thin-film transistor with π-shaped active region for device reliability improvement
Author:
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.2729464
Reference17 articles.
1. Depletion-mode TFT made of low-temperature poly-Si
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1. Block-Oxide Structure in Polycrystalline Silicon Thin-Film Transistor With Source/Drain Tie and Additional Polycrystalline Silicon Body for Analog Applications;Journal of Display Technology;2015-02
2. An Experimental Study of Block-Oxide Source/Drain-Tied Polycrystalline-Silicon Thin-Film Transistors With Additional Polycrystalline-Silicon Body;IEEE Transactions on Electron Devices;2012-12
3. High Doping Density/High Electric Field, Stress and Heterojunction Effects on the Characteristics of CMOS Compatible p-n Junctions;Journal of The Electrochemical Society;2011
4. Source/drain-tied bottom gate MOSFET for device reliability improvement;2008 26th International Conference on Microelectronics;2008-05
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