Achieving low-voltage operating high-mobility organic thin-film transistors by a multi-layered gate dielectric

Abstract

Organic thin-film transistors (OTFTs) have attracted great attention for their inherent advantages and promising applications in emerging fields. Simultaneously realizing low-voltage operation and high-mobility in one OTFT is one of prerequisites for the commercialization, which is a huge challenge so far. An important route to address this challenge is to develop an ideal gate dielectric with a high capacitance and a low interfacial trap density at the dielectric/channel. In this Letter, we demonstrate the low-voltage operating high-mobility OTFTs by elaborately designing and processing a multi-layered gate dielectric. The gate dielectric consists of a high permittivity polymer film, a polymer buffing layer with a high surface energy, and an ultrathin long-chain alkane buffer layer. The effects of both the structures and the processes of gate dielectrics on the performances of OTFTs are investigated in detail. In addition, the relevant physical mechanisms are discussed. Finally, the optimal OTFTs exhibit high mobilities with the average and maximum values up to 5.62 and 6.74 cm2/V s, respectively, at low operating voltages below −5 V. Our findings reveal that designing and processing a reasonable multi-layered gate dielectric is a promising strategy to achieve both high-mobility and low-voltage operation in OTFTs, thereby fostering their development.