Analysis and control of the intermediate memory states of RRAM devices by means of admittance parameters-Reference-Cited by-同舟云学术

Analysis and control of the intermediate memory states of RRAM devices by means of admittance parameters

Published:2018-10-21 Issue:15 Volume:124 Page:152101
ISSN:0021-8979
Container-title:Journal of Applied Physics
language:en
Short-container-title:Journal of Applied Physics

Author:

Castán H.¹^ORCID,Dueñas S.¹^ORCID,García H.¹,Ossorio O. G.¹^ORCID,Domínguez L. A.¹,Sahelices B.¹,Miranda E.²,González M. B.³^ORCID,Campabadal F.³^ORCID

Affiliation:

1. Department of Electronics, University of Valladolid, 47011 Valladolid, Spain

2. Departament d’Enginyería Electrònica, Universitat Autónoma de Barcelona, 08193 Bellaterra, Spain

3. Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Campus UAB, 08193 Bellaterra, Spain

Funder

Ministerio de Economía y Competitividad

Publisher

AIP Publishing

Subject

General Physics and Astronomy

Link

http://aip.scitation.org/doi/pdf/10.1063/1.5024836

Reference35 articles.

1. Emerging memories: resistive switching mechanisms and current status

2. Memristive Devices for Computing: Mechanisms, Applications and Challenges

3. Training and operation of an integrated neuromorphic network based on metal-oxide memristors

4. Nanoionics-based resistive switching memories

5. Filament Conduction and Reset Mechanism in NiO-Based Resistive-Switching Memory (RRAM) Devices

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