Nonuniform threshold voltage profile in a-Si:H thin film transistor stressed under both gate and drain biases
Author:
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.3033527
Reference17 articles.
1. Drain-Bias Dependence of Threshold Voltage Stability of Amorphous Silicon TFTs
2. Localization of Gate Bias Induced Threshold Voltage Degradation in a-Si:H TFTs
3. Characterization of instability in amorphous silicon thin‐film transistors
4. A bidirectional NMOSFET current reduction model for simulation of hot-carrier-induced circuit degradation
5. Time and temperature dependence of instability mechanisms in amorphous silicon thin‐film transistors
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3. Distributions of the threshold voltage and the temperature in the channel of amorphous silicon thin film transistors;Acta Physica Sinica;2012
4. A Practical Model Assessing the Degradation of Polycrystalline Silicon TFTs Due to DC Electrical Stress;IEEE Transactions on Electron Devices;2010-06
5. Parameter Extraction of Short-Channel a-Si:H TFT Including Self-Heating Effect and Drain Current Nonsaturation;IEEE Transactions on Electron Devices;2010-05
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