High-Performance Symmetric Block Ciphers on Multicore CPU and GPUs

Author:

Nishikawa Naoki1,Iwai Keisuke1,Kurokawa Takakazu1

Affiliation:

1. National Defense Academy of Japan

Publisher

IJNC Editorial Committee

Reference19 articles.

1. [1] Cryptography Research and Evaluation Committees. http://www.cryptrec.go.jp/english/index.html.

2. [2] Aoki, Kazumaro and Ichikawa, Tetsuya and Kanda, Masayuki and Matsui, Mitsuru and Moriai, Shiho and Nakajima, Junko and Tokita, Toshio. Specification of Camellia —a 128-bit Block Cipher Version 2.0. Order A Journal On The Theory Of Ordered Sets And Its Applications, pages 1-35, 2001.

3. [3] Kosuke Asahi, Toyoshi Masuda, Eikou Nishikawa, Yuto Yokoyama, Yasutaka Igarashi, and Toshinobu Kaneko. A Fast implementation on the 64 bit environment of the suggested cipher in CRYPTREC (in Japanese). In Proceedings of The 29th Symposium on Cryptography and Information Security, Fukuoka, Japan, September 2010.

4. [4] Andrea Di Biagio, Alessandro Barenghi, Giovanni Agosta, and Gerardo Pelosi. Design of a parallel AES for graphics hardware using the CUDA framework. Parallel and Distributed Processing Symposium, International, pages 1-8, 2009.

5. [5] Eli Biham. A Fast New DES Implementation in Software. pages 260-272. Springer-Verlag, 1997.

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