Methodology to improve the model of series inductance in cmos integrated inductors-Reference-Cited by-同舟云学术

Methodology to improve the model of series inductance in cmos integrated inductors

Published:2018-06-01 Issue:3 Volume:69 Page:250-254
ISSN:1339-309X
Container-title:Journal of Electrical Engineering
language:en
Short-container-title:

Author:

Gutierrez-Frias Eric F.¹,García-Lugo Luis A.¹,Becerra-Alvarez Edwin C.¹,Raygoza-Panduro Juan J.¹,de la Rosa José M.²,Ortega-Rosales Edgardo B.³

Affiliation:

1. University Center for Exact Sciences and Engineering, Universidad de Guadalajara, Av. Marcelino García Barragán and Calz. Olímpica 1421, Guadalajara, Jalisco , México

2. Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC/Universidad de Sevilla, /Américo Vespucio, 41092 Sevilla , Spain

3. Universidad Tecnológica de la Zona Metropolitana de Guadalajara, camino a San Isidro Mazatepec Km 4.7, Tlajomulco de Zuñiga, Jalisco , México

Abstract

Abstract This paper presents a systematic optimization methodology to achieve an accurate estimation of series inductance of inductors implemented in standard CMOS technologies. Proposed method is based on an optimization procedure which aims to obtain adjustment factors associated to main physical inductor characteristics, allowing to estimate more accurate series inductance values that can be used in design stage. Experimental measurements of diverse square inductor geometries are shown and compared with previous approaches in order to demonstrate and validate presented approach

Publisher

Walter de Gruyter GmbH

Link

https://www.sciendo.com/pdf/10.2478/jee-2018-0034

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