Avalanche Hot Source Method for Separated Extraction of Parasitic Source and Drain Resistances in Single Metal-Oxide-Semiconductor Field Effect Transistors-Reference-Cited by-同舟云学术

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Avalanche Hot Source Method for Separated Extraction of Parasitic Source and Drain Resistances in Single Metal-Oxide-Semiconductor Field Effect Transistors

Published:2012-03-31 Issue:1 Volume:12 Page:46-52
ISSN:1598-1657
Container-title:JSTS:Journal of Semiconductor Technology and Science
language:en
Short-container-title:JSTS:Journal of Semiconductor Technology and Science

Author:

Baek Seok-Cheon,Bae Hag-Youl,Kim Dae-Hwan,Kim Dong-Myong

Publisher

The Institute of Electronics Engineers of Korea

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://ocean.kisti.re.kr/downfile/crosscheck/ieek/JAKO201211559435512.pdf

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Vertical C-Shaped-Channel Nanosheet FETs Featured With Precise Control of Both Channel-Thickness and Gate-Length;IEEE Electron Device Letters;2022-08

2. Alternating Current-Based Technique for Separate Extraction of Parasitic Resistances in MISFETs With or Without the Body Contact;IEEE Electron Device Letters;2020-10

3. Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation;IEEE Electron Device Letters;2020-01

4. A review of DC extraction methods for MOSFET series resistance and mobility degradation model parameters;Microelectronics Reliability;2017-02

5. Effect of source and drain asymmetry on hot carrier degradation in vertical nanowire MOSFETs;Microelectronics Reliability;2015-08

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