Hybrid architecture for multiple transforms for signal processing applications

Author:

Chaithanya Krishna D.C.1,Tripathi Shikha1

Affiliation:

1. Department of Electronics and Communication Engineering PES University, Bangalore, India

Publisher

IOS Press

Subject

Artificial Intelligence,General Engineering,Statistics and Probability

Reference6 articles.

1. Why systolic architectures?;Kung;IEEE computer,1982

2. Triple matrix product architectures for fast signal processing;Aravena;IEEE transactions on circuits and systems,1988

3. Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST;Chiper;IEEE Transactions on Circuits and Systems I: Regular Papers,2005

4. Hybrid Architecture and VLSI Implementation of the Cosine–Fourier–Haar Transforms;Wahid;Circuits, Systems and Signal Processing,2010

5. Triple-Matrix Product-Based 2D Systolic Implementation of Discrete Fourier Transform;Mamatha;Circuits, Systems, and Signal Processing,2015

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