Design and Analysis of Low Power Hybrid Memristor-CMOS Based Distinct Binary Logic Nonvolatile SRAM Cell-Reference-Cited by-同舟云学术

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Design and Analysis of Low Power Hybrid Memristor-CMOS Based Distinct Binary Logic Nonvolatile SRAM Cell

Published:2016 Issue:03 Volume:07 Page:119-127
ISSN:2153-1285
Container-title:Circuits and Systems
language:
Short-container-title:CS

Author:

Saminathan Veerappan,Paramasivam Kuppusamy

Publisher

Scientific Research Publishing, Inc.

Subject

General Medicine

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Memristor-Based Architectures for PFSCL Circuit Realizations;Circuits, Systems, and Signal Processing;2023-03-25

2. A novel design of high performance and robust ultra-low power SRAM cell based on memcapacitor;Nanotechnology;2022-01-24

3. Design and Comparative Power Analysis of Conventional 6T SRAM with 7T2M nv-SRAM at 180 nm Technology;Advances in Intelligent Systems and Computing;2021-12-07

4. A Novel Hybrid CMOS-Memristor Based 2-Bit Magnitude Comparator using Memristor Ratioed Logic Universal Gate for Low Power Applications;2021 International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA);2021-10-08

5. Memristor based high speed and low power consumption memory design using deep search method;Journal of Ambient Intelligence and Humanized Computing;2020-03-04

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