1. 1) M. Koyanagi, T. Nakamura, K. W. Lee, Y. Igarashi, T. Mizukusa, Y. Yamada, T. Morooka and H. Kuriono ; Advanced Metallization Conference 2001 (AMC2001), A. J. McKerrow, Y. Shacham-Diamondo, S. Zaima and T. Ohba, Editors, Conference Proceedings ULSI XVIII, p. 20, (The Materials Research Society, 2001).
2. 2) M. Tomisaka, H. Yonemura, M. Hoshino and K. Takahashi ; Solid State Devices and Materials, p. 40 (The Japan Society of Applied Physics, 2001).
3. 3) K. Takahashi ; The 2nd Annual Meeting on Electronic SI Technologies, p. 43, Tokyo (2001)(in Japanese).
4. High-Aspect-Ratio Copper-Via-Filling for Three-Dimensional Chip Stacking
5. High-Aspect-Ratio Copper Via Filling Used for Three-Dimensional Chip Stacking