Impact of device scaling on the electrical properties of MoS2 field-effect transistors

Author:

Arutchelvan Goutham,Smets Quentin,Verreck Devin,Ahmed Zubair,Gaur Abhinav,Sutar Surajit,Jussot Julien,Groven Benjamin,Heyns Marc,Lin Dennis,Asselberghs Inge,Radu Iuliana

Abstract

AbstractTwo-dimensional semiconducting materials are considered as ideal candidates for ultimate device scaling. However, a systematic study on the performance and variability impact of scaling the different device dimensions is still lacking. Here we investigate the scaling behavior across 1300 devices fabricated on large-area grown MoS2 material with channel length down to 30 nm, contact length down to 13 nm and capacitive effective oxide thickness (CET) down to 1.9 nm. These devices show best-in-class performance with transconductance of 185 μS/μm and a minimum subthreshold swing (SS) of 86 mV/dec. We find that scaling the top-contact length has no impact on the contact resistance and electrostatics of three monolayers MoS2 transistors, because edge injection is dominant. Further, we identify that SS degradation occurs at short channel length and can be mitigated by reducing the CET and lowering the Schottky barrier height. Finally, using a power performance area (PPA) analysis, we present a roadmap of material improvements to make 2D devices competitive with silicon gate-all-around devices.

Publisher

Springer Science and Business Media LLC

Subject

Multidisciplinary

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