1. Turner, V. The digital universe of opportunities. EMC
https://www.emc.com/leadership/digital-universe/2014iview/executive-summary.htm
(2014).
2. Kim, C. et al. A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory. IEEE International Solid-State Circuits Conference 2017, San Francisco, CA, USA. IEEE Xplore.
https://doi.org/10.1109/ISSCC.2017.7870331
(2017).
3. Gonzales, M. A., Holman, T. J. & Stolt, P. F. Method and apparatus for automatically scrubbing ECC errors in memory via hardware. US Patent US6101614 A (2000).
4. Oshaki, A. & Yamada, A. Memory device to detect and compensate for defective memory cells. US Patent US5477492 A (1995).
5. Hirohata, A., Yamamoto, Y., Murphy, B. A. & Vick, A. J. Non-destructive imaging of buried electronic interfaces using a decelerated scanning electron beam. Nature Commun. 7, 12701 (2016).