Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits-Reference-Cited by-同舟云学术

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

Published:2024-01-04 Issue:2 Volume:18 Page:1543-1554
ISSN:1936-0851
Container-title:ACS Nano
language:en
Short-container-title:ACS Nano

Author:

Shin Jong Chan¹,Lee Jae Hak²³,Jin Minho²^ORCID,Lee Haeyeon¹,Kim Jiyeon⁴^ORCID,Lee Jiho⁴^ORCID,Lee Chan¹,You Wonho³⁴,Yang Hyunkyu¹⁵,Kim Youn Sang¹²⁴⁶^ORCID

Affiliation:

1. Department of Chemical and Biological Engineering, and Institute of Chemical Processes, College of Engineering, Seoul National University, Seoul 08826, Republic of Korea

2. Program in Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Seoul 08826, Republic of Korea

3. Samsung Display Company, Ltd., 1 Samsung-ro, Giheung-gu, Yongin-si, Gyeonggi-do 17113, Republic of Korea

4. Department of Applied Bioengineering, Graduate School of Convergence Science and Technology, Seoul National University, Seoul 08826, Republic of Korea

5. Samsung Electronics Company, 129 Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do 16677, Republic of Korea

6. Advanced Institute of Convergence Technology, Suwon 16229, Republic of Korea

Funder

National Research Foundation of Korea

Korea Institute for Advancement of Technology

Seoul National University

Publisher

American Chemical Society (ACS)

Link

https://pubs.acs.org/doi/pdf/10.1021/acsnano.3c09168

Reference71 articles.

1. A New High-Density and Ultrasmall-Cell-Size Contact RRAM (CR-RAM) With Fully CMOS-Logic-Compatible Technology and Circuits