Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI-Reference-Cited by-同舟云学术

Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI

Published:2020-04-21 Issue:19 Volume:12 Page:22347-22356
ISSN:1944-8244
Container-title:ACS Applied Materials & Interfaces
language:en
Short-container-title:ACS Appl. Mater. Interfaces

Author:

Zhan Tianzhuo¹^ORCID,Oda Kaito¹,Ma Shuaizhe¹,Tomita Motohiro¹,Jin Zhicheng¹,Takezawa Hiroki¹,Mesaki Kohei¹,Wu Yen-Ju²^ORCID,Xu Yibin²^ORCID,Matsukawa Takashi³,Matsuki Takeo¹³,Watanabe Takanobu¹

Affiliation:

1. Waseda University, 3-4-1 O̅okubo, Shinjuku-ku, Tokyo 169-8555, Japan

2. National Institute for Materials Science, 1-2-1 Sengen, Tsukuba 305-0047, Japan

3. National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba, Ibaraki 305-8560, Japan

Funder

Core Research for Evolutional Science and Technology

Hirose International Scholarship Foundation

Publisher

American Chemical Society (ACS)

Subject

General Materials Science

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